High-Power, Quad, PSE Controller
for Power-Over-Ethernet
30   ______________________________________________________________________________________
Table 13a. Port Status Registers
ADDRESS = 0Ch, 0Dh, 0Eh, 0Fh
SYMBOL
BIT
R/W
DESCRIPTION
Reserved
7
R
Reserved
6
R
CLASS_[2]
5
R
CLASS_[1]
CLASS_
4
R
CLASS_[0]
Reserved
3
R
Reserved
2
R
DET_[2]
1
R
DET_[1]
DET_ST_
0
R
DET_[0]
Table 13b. Detection Result Decoding Chart
DET_ST_[2:0]
(ADDRESS = 0Ch, 0Dh, 0Eh, 0Fh)
DETECTED
DESCRIPTION
000
None
Detection status unknown
001
DCP
Positive DC supply connected at the port (AGND - V
OUT_
 < 1V)
010
HIGH CAP
High capacitance at the port (> 8.5礔)
011
RLOW
Low resistance at the port, R
PD
 < 15k&
100
DET_OK
Detection pass, 15k& > R
PD
 > 33k&
101
RHIGH
High resistance at the port, R
PD
 > 33k&
110
OPEN0
Open port (I < 10礎)
111
DCN
Negative DC supply connected to the port (V
OUT
 - V
EE
 < 2V)
Table 13c. Classification Result Decoding
Chart
CLASS_[2:0]
(ADDRESS = 0Ch, 0Dh, 0Eh, 0Fh)
CLASS RESULT
000
Unknown
001
1
010
2
011
3
100
4
101
5
110
0
111
Current limit (> I
CILIM
)
The port status register (Table 13a) records the results of
the detection and classification at the end of each phase
in three encoding bits each. R0Ch contains the detection
and classification status of port 1. R0Dh corresponds to
port 2, R0Eh corresponds to port 3, and R0Fh corre-
sponds to port 4. Tables 13b and 13c show the detec-
tion/classification result decoding charts, respectively.
For CLC_EN = 0, the detection result is shown in Table
13b. When CLC_EN is set high, the MAX5952 allows valid
detection of high capacitive load of up to 100礔.
When ping-pong classification is not enabled (ENx_CL6
= 0), the classification status is reported in Table 13c.
When ping-pong classification is enabled (ENx_CL6 =
1), the CLASS_[2:0] bits are set to 000 and the classifi-
cation result is reported in locations R2ChR2Fh.
As a protection, when POFF_CL (R17h[3], Table 21) is
set to 1, the MAX5952 prohibits turning on power to the
port that returns a status 111 after classification. A reset
sets 0Ch, 0Dh, 0Eh, and 0Fh = 00h.
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